There are known methods of current sensing in semiconductor telling devices. For example, a simple current-sensing circuit utilizes a sense resistor connected in series in the current-flow path, wherein the voltage drop across the sense resistor is linearly proportional to the current. However, the power loss in the sense resistor, and source voltage variations versus switch currents makes this method unacceptable for certain types of high-performance power converter devices requiring high efficiencies.
Another common method of current sensing is by utilizing the known switch drain-to-source conduction resistance, known as RDS(on). Switching devices (e.g., MOSFETs) in power supply circuits typically transfer the current from the input supply to the output load. When the switches conduct current they have a characteristic series resistance that may be used as series sense resistors. The current can therefore be inferred by sensing the voltage across the switch and knowing its characteristics impedance, i.e., ID=VDS/RDS(on). When the switch is conducting and the voltage across it is therefore small, the MOSFET is in its normal on-state region and acts like a linear resistor.
Yet another known technique of current sensing is through the internally built-in sense FET that is defined by sensing the current through a small fraction of the conduction channel (drift region) of the main switch. If the power switch is on-chip, the tolerance of sensing the current through the MOSFET is improved by using a smaller, matched sense FET (e.g., in a current-mirror configuration). The gate-source and drain-source voltages of both the main power FET and sense FET are made equal by shorting main-drain to sense-drain and main-source to sense-source. Drain current, ID, is a function of gate-source voltage, VGS, and drain-source voltage, VDS; hence the corresponding current densities are equal. That means that if the sense FET is a N-times smaller channel but matched device, its current is linearly proportional and N times smaller than the current flowing through the power device (N˜1000 to 10,000).
The sense FET approach to sensing current is generally more accurate then other prior art techniques, but it still has drawbacks. For instance, accuracy of the sense FET approach is limited by the matching performance of the sense and power FETs, which tends to degrade with larger values of N. In addition, like RDS(on) sensing, the sense FET approach requires a sample-and-hold capacitor to hold the sensed current as a voltage during off times. Noise may be introduced due to transient spikes that may occur across the capacitor.